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Design Verification Engineer



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Mountain View, CA, USA · San Diego, CA, USA
Posted on Monday, February 12, 2024
Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Mountain View, CA, USA; San Diego, CA, USA.

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 5 years of experience with verification methodologies and languages such as UVM and SystemVerilog.
  • Experience developing and maintaining verification testbenches, test cases, and test environments.

Preferred qualifications:

  • Master's degree in Electrical Engineering or Computer Science with 2 years of relevant experience, or PhD in Electrical Engineering or Computer Science.
  • Experience creating/using verification components and environments in methodology (e.g., VMM, OVM, UVM).
  • Experience with image processing, computer vision, and/or machine learning applications.
  • Experience prototyping and debugging systems on Field Programmable Gate Array (FPGA) platforms.
  • Experience with performance verification of ASIC components.
  • Familiarity with ASIC standard interfaces and memory system architecture.

This job is no longer accepting applications

See open jobs at Google.