Minimum qualifications:

• Bachelor's degree in Electrical Engineering, related field, or equivalent practical experience.
  
• 16 years of experience working with hardware verification languages (System Verilog/Specman), design verification methodologies, and chip design flow.
  
• Experience creating detailed chip or subsystem design verification strategies and plans.
  
• Experience leading design verification teams through the full cycle from concept to delivery.
  

Preferred qualifications:

• Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
• Experience with verification techniques and the full verification life cycle.
  
• Experience with performance verification of ASICs and ASIC components.
• Experience with ASIC standard interfaces and memory system architecture.
• Experience with multiple SOC projects/cycles in 3 or more products.