Senior Design Verification Engineer, Multimedia, Silicon
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See open jobs at Google.See open jobs similar to "Senior Design Verification Engineer, Multimedia, Silicon" Out for Undergrad.Senior Design Verification Engineer, Multimedia, Silicon
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Note: By applying to this position you will have an opportunity to share your preferred working location from the following: New Taipei, Banqiao District, New Taipei City, Taiwan; Taipei, Taiwan.Minimum qualifications:
- Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience.
- Experience verifying digital logic at RTL using SystemVerilog for ASICs.
- Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
- Experience with object oriented programming.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Science, or a related field.
- Experience creating and using verification components and environments in a standard verification methodology such as UVM.
- Experience with image processing or other multimedia IPs such as Display or Video Codec.
- Experience with performance verification of ASICs, ASIC components, and ASIC standard interfaces and memory system architecture.
- Experience with verification techniques, System Verilog Assertions (SVA) and assertion-based verification.
- Experience with Gate Level Simulation (GLS), low-power design verification, and support of SoC DV.
About the job
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
- Plan the verification of complex digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.
- Create and enhance constrained-random verification environments using SystemVerilog and Universal Verification Methodology (UVM).
- Identify and write all types of coverage measures for stimulus and corner-cases.
- Debug tests with design engineers to deliver functionally correct design blocks.
- Close coverage measures to identify verification holes and to show progress towards tape-out.
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If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form.
Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.
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This job is no longer accepting applications
See open jobs at Google.See open jobs similar to "Senior Design Verification Engineer, Multimedia, Silicon" Out for Undergrad.