Senior Formal Verification Engineer
Microsoft
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See open jobs at Microsoft.See open jobs similar to "Senior Formal Verification Engineer" Out for Undergrad.Senior Formal Verification Engineer
Bangalore, Karnataka, India
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Overview
Microsoft is a highly innovative company that collaborates across disciplines to produce cutting edge technology that changes our world. Microsoft’s Silicon team builds custom silicon for a diverse set of systems ranging from innovative consumer products like Xbox to high-performance Azure cloud servers, clients, and augmented reality.
We are looking for a Senior Formal Verification Engineer to work in the dynamic Microsoft Artificial Intelligence Silicon Engineering team (AISiE). The candidate must be a highly motivated self-starter who will thrive in this cutting-edge technical environment.
Microsoft’s mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.
Qualifications
- 7 or more years of experience in design verification with 4+ years of proven track record in using formal verification techniques on complex SoC IP’s (CPU, Neural Networks IPs, DMA, Security IP, Interconnects, power management etc.)
- Formal method or formal verification technologies experience and abstraction techniques.
- Knowledge and experience in interpreting hardware logic, familiarity with SV/Verilog/VHDL HDLs and using assertion-based languages like SVA or PSL.
- Experience in using Industry standard EDA formal tools for property verification and logic equivalency checks.
- Strong understanding of digital design principles, Datapath architecture, and arithmetic units
- Strong proficiency in scripting language such as Python or Perl with excellent debugging skills
- Passionate about developing world-class/innovative formal verification solutions.
Desirable:
- Experience using VC_Formal, SLEC tools
- Experience of working on AI/ML SoCs or CPU cores
- Tool development experience
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Responsibilities
The AISiE silicon team is seeking a passionate, driven, and intellectually curious computer/electrical engineer to deliver premium-quality designs once considered impossible. We are responsible for delivering cutting-edge, custom IP and SoC designs that can perform complex and high-performance functions in an extremely efficient manner.
- Own formal verification of complex modules at the IP/Subsystem/SOC level using latest techniques to increase the RTL design quality.
- Collaborate with the architecture and design teams to define formal verification scope.
- Identify right strategy to prove RTL correctness by deploying advance formal techniques and create abstraction models for convergence.
- Create formal verification test plan track and verify respective test plan.
- Innovate new technologies, evaluate new tools, and corroborate results.
- Debug RTL to identify causes of failure scenarios.
- Work with vendors on resolving hard design and tool problems.
- Articulate formal verification coverage of the design to partners.
- Demonstrate Microsoft core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion
This job is no longer accepting applications
See open jobs at Microsoft.See open jobs similar to "Senior Formal Verification Engineer" Out for Undergrad.